PDP-8/I CPU Engineering Drawings

Company:Digital Equipment Corporation
Part:
Date:1969
Keywords:

Table of Contents

  • D-BS-8I-0-2-Z Timing, Manual Functions & Run (2 sheets)
  • D-BS-8I-0-3-J Instruction Reg & Major States
  • D-BS-8I-0-4-J Reg Output Gate Control
  • D-BS-8I-0-5-H Shift & Carry Gate Control
  • D-BS-8I-0-6-H Reg Input Control & Skip
  • D-BS-8I-0-7-L Interrupt & Break Control
  • D-BS-8I-0-8-E Major Registers
  • D-BS-8I-0-9-E Major Register Gating (4 sheets)
  • D-BS-8I-0-10-P I/O Level Converters
  • D-BS-8I-0-11-D Teletype Receiver
  • D-BS-8I-0-12-C Teletype Transmitter
  • D-BS-8I-0-13-F Memory Control
  • D-BS-8I-0-14-D Sense Amps & Inhibit Drivers
  • D-BS-8I-0-15-C X Axis Selection
  • D-BS-8I-0-16-C Y Axis Selection
  • D-CS-8I-0-27-A PDP 8I Console Switches & Indicators
  • D-MU-8I-0-17-AK Module Utilization (2 sheets)

Copies

Address: http://bitsavers.org/pdf/dec/pdp8/pdp8i/PDP8-I_CPU_blueprints_1969.pdf
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