List of Tables

| Table of Contents | List of Figures | List of Tables |

Table 1-1. Hardware Series and the CPUs They Use

Table 1-2. Bus Interfaces for Silicon Graphics Platforms

Table 2-1. Standard Entry Points

Table 2-2. Entry Point Driver Routines

Table 2-3. Interrupt and Initialization Handling Routines

Table 2-4. STREAMS Driver Entry Points

Table 4-1. DMA Utility Routines

Table 5-1. dslib Routines

Table 6-1. Indigo, Indigo2, and Indy Slot Names and Addresses

Table 10-1. Processor and Coprocessor General-purpose Registers

Table 10-2. R2000-R4000 Processor and Coprocessor Special Registers

Table 10-3. R4000-only System Coprocessor Registers

Table 10-4. R8000-only Special Registers

Table 10-5. symmon's dbgmon Mode Commands

Table 11-1. Kernel-tunable Parameters

Table A-1. CPUs Used in Silicon Graphics Computer Systems

Table A-2. Cache Line Sizes by Processor Type

Table A-3. A24 Kernel/VME-bus Address Mapping

Table A-4. A32 Kernel/VME-bus Address Mapping

Table A-5. Dual VME-bus Address Mapping

Table A-6. A32 VME-bus/Physical Address Mapping

Table A-7. VME-bus Space Reserved for Customer Drivers

Table B-1. Primary Sense Key Information

Table B-2. Additional Sense Code

Table B-3. SCSI Driver Error Messages

Table B-4. Error Messages Useful for Debugging

Table B-5. SCSI State Error Messages

Table B-6. Phases During a Select-and-Transfer Command