Chapter 2. Addressing

This chapter describes the formats that you can use to specify addresses. SGI CPUs use a byte addressing scheme. Access to halfwords requires alignment on even byte boundaries, and access to words requires alignment on byte boundaries that are divisible by four. Access to doublewords (for 64-bit systems) requires alignment on byte boundaries that are divisible by eight. Any attempt to address a data item that does not have the proper alignment causes an alignment exception.

The unaligned assembler load and store instructions may generate multiple machine language instructions. They do not raise alignment exceptions.

These instructions load and store unaligned data:

These instructions load and store aligned data

Address Formats

The assembler accepts these formats shown in Table 2-1 for addresses. Table 2-2 explains these formats in more detail.

Table 2-1. Address Formats

Format

Address

(base register)

Base address (zero offset assumed)

expression

Absolute address

expression (base register)

Based address

index-register (base register)

Based address

relocatable-symbol

Relocatable address

relocatable-symbol + expression

Relocatable address

relocatable-symbol + expression (index register)

Indexed relocatable address


Address Descriptions

The assembler accepts any combination of the constants and operations described in this chapter for expressions in address descriptions.

Table 2-2. Assembler Addresses

Expression

Address Description

( base-register )

Specifies an indexed address, which assumes a zero offset. The base-register contents specify the address.

expression

Specifies an absolute address. The assembler generates the most locally efficient code for referencing a value at the specified address.

expression (base-register)

Specifies a based address. To get the address, the CPU adds the value of the expression to the contents of the base-register.

index-register(base-register)

Same as expression(base-register), except that the index register is used as the offset.

relocatable-symbol

Specifies a relocatable address. The assembler generates the necessary instruction(s) to address the item and generates relocatable information for the link editor.

relocatable-symbol + expression

Specifies a relocatable address. To get the address, the assembler adds or subtracts the value of the expression, which has an absolute value, from the relocatable symbol. The assembler generates the necessary instruction(s) to address the item and generates relocatable information for the link editor. If the symbol name does not appear as a label anywhere in the assembly, the assembler assumes that the symbol is external.

relocatable-symbol (index register)

Specifies an indexed relocatable address. To get the address, the CPU adds the index register to the relocatable symbol's address. The assembler generates the necessary instruction(s) to address the item and generates relocatable information for the link editor. If the symbol name does not appear as a label anywhere in the assembly, the assembler assumes that the symbol is external.

relocatable + expression

Specifies an indexed relocatable address. To get the address, the assembler adds or subtracts the relocatable symbol, the expression, and the contents of the index register. The assembler generates the necessary instruction(s) to address the item and generates relocation information for the link editor. If the symbol does not appear as a label anywhere in the assembly, the assembler assumes that the symbol is external.