6.13 System Interface Bus Encoding
SysCmd[11] Encoding
When SysVal* is asserted, SysCmd[11] indicates whether the SysAD[63:0] bus represents an address or a data cycle, as shown in Table 6-2.
Table 6-2 Encoding of SysCmd[11]
SysCmd[10:0] Address Cycle Encoding
During the address cycle of processor read and upgrade requests, SysCmd[10:8] contain the request number, as shown in Table 6-3. The request number provides a mechanism to associate an external response with the corresponding processor request.
Table 6-3 Encoding of SysCmd[10:8] for Processor Read and Upgrade Requests 
During the address cycle of processor requests, SysCmd[7:5] contain the command, as shown in Table 6-4.
Table 6-4 Encoding of SysCmd[7:5] for Processor Requests
During the address cycle of processor read requests, SysCmd[4:3] contain the read cause indication, as shown in Table 6-5. This information is useful in handling the associated external response.
Table 6-5 Encoding of SysCmd[4:3] for Processor Read Requests 
During the address cycle of processor write requests, SysCmd[4:3] contain the write cause indication, as shown in Table 6-6. This information is useful in handling the associated write data.
Table 6-6 Encoding of SysCmd[4:3] for Processor Write Requests
During the address cycle of processor upgrade requests, SysCmd[4:3] contain the upgrade cause indication, as shown in Table 6-7. This information useful in handling the associated external response.
Table 6-7 Encoding of SysCmd[4:3] for Processor Upgrade Requests
During the address cycle of processor special requests, SysCmd[4:3] contain the processor special cause indication, as shown in Table 6-8. This information differentiates between the various processor special requests.
Table 6-8 Encoding of SysCmd[4:3] for Processor Special Requests
During the address cycle of processor block read, typical block write, upgrade, and eliminate requests, SysCmd[2:1] contain the secondary cache block former state, as shown in Table 6-9. This information may be useful for system designs implementing a duplicate tag or a directory-based coherency protocol.
Table 6-9 Encoding of SysCmd[2:1] for Processor Block Read/Write,
Upgrade, Eliminate Requests 
During the address cycle of processor double/single/partial-word read and write requests, SysCmd[2:0] contain the data size indication, as shown in Table 6-10.
Table 6-10 Encoding of SysCmd[2:0] for Processor Double/Single/Partial-Word Read/Write Requests 
During the address cycle of external intervention and invalidate requests, SysCmd[10:8] contain the request number, as shown in Table 6-11. The request number provides a mechanism to associate a potential processor coherency data response with the corresponding external coherency request.
Table 6-11 Encoding of SysCmd[10:8] for External Intervention
and Invalidate Requests
During the address cycle of external requests, SysCmd[7:5] contain the command, as shown in Table 6-12.
Table 6-12 Encoding of SysCmd[7:5] for External Requests 
During the address cycle of external special requests, SysCmd[4:3] contain the external special cause indication, as shown in Table 6-13. This information is used to differentiate between the various external special requests.
Table 6-13 Encoding of SysCmd[4:3] for External Special Requests 
During external address cycles, SysCmd[0] specifies whether ECC checking and correcting is to be performed for the SysAD[63:0] bus, as shown in Table 6-14. During the address cycle of processor block read, data typical block write, upgrade, and eliminate requests, the processor asserts SysCmd[0]. Consequently, in a multiprocessor system using the cluster bus, ECC checking and correcting is enabled for external coherency requests resulting from processor coherent block read and upgrade requests.
SysCmd[10:0] Data Cycle Encoding
During the data cycles of an external data response or a processor coherency data response, SysCmd[10:8] contain the request number associated with the original request, as shown in Table 6-15.
Table 6-15 Encoding of SysCmd[10:8] for Data Responses 
During data cycles, SysCmd[5] indicates the data quality, as shown in Table 6-16.
Table 6-16 Encoding of SysCmd[5] for Data Cycles 
During data cycles, SysCmd[4:3] indicate the data type, as shown in Table 6-17. Processor block write and double/single/partial-word write requests use request data and request last data type indications. External data and processor coherency data responses use response data and response last data type indications.
Table 6-17 Encoding of SysCmd[4:3] for Data Cycles 
During data cycles of an external block data response or processor coherency data response, SysCmd[2:1] contain the state of the cache block, as shown in Table 6-18.
Table 6-18 Encoding of SysCmd[2:1] for Block Data Responses 
During data cycles, SysCmd[0] specifies whether ECC checking and correcting is to be performed for the SysAD[63:0] bus, as shown in Table 6-19. During processor data cycles, the processor asserts SysCmd[0]. Consequently, in a multiprocessor system using the cluster bus, ECC checking and correcting will be enabled for external block data responses resulting from processor coherency data responses.
Table 6-19 Encoding of SysCmd[0] for External Data Cycles 
SysCmd[11:0] Map
Table 6-20 presents a map for the SysCmd[11:0] bus.
Table 6-20 SysCmd[11:0] Map 
