1.3 What is an R10000 Microprocessor?

Primary Instruction Cache (I-cache)

• it contains 32 Kbytes, organized into 16-word blocks, is 2-way set associative, using a least-recently used (LRU) replacement algorithm
• it reads four consecutive instructions per cycle, beginning on any word boundary within a cache block, but cannot fetch across a block boundary.
• its instructions are predecoded, its fields are rearranged, and a 4-bit unit select code is appended
• it checks parity on each word
• it permits non-blocking instruction fetch