12.1 DC Electrical Specification
DCOk and Power Supply Sequencing
The following guidelines are designed to protect the processor from damage or latch-up:
- With respect to the Vcc (3.3V) (supply to the core), VccQ[SC,Sys] (either 1.5V or 3.3V) must not be driven more than a diode threshold voltage.
- Vref should not go higher than VccQ[SC,Sys]. Generally, Vref is derived from VccQ through a resistor divider, and therefore cannot rise above VccQ.
- The power to termination resistors must not arrive before Vcc and VccQ[SC,Sys] arrive at the processor.
- None of the supplies can float or be driven negative.
One method of protecting the processor from excessive input voltage is to sequence the power supplies for the entire system, ensuring that the power to the processor is stable before any components drive signals to the processor. Another method to tristate all external drivers to the processor with the DCOk pin, until the processor has stabilized.
NOTE: The input voltage required for the DCOk is 3.3V in either the CMOS/TTL or the HSTL configuration. Both DCOk pins must be tied together externally.
Copyright 1996, 1997, MIPS Technologies, Inc. -- 09 DEC 96
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