15.4 Floating-Point Control Registers
Floating-Point Implementation and Revision Register
The following fields are defined for control register 0 in Coprocessor 1, the FP Implementation and Revision register, as shown in Figure 15-6:
- The Implementation field holds an 8-bit number, 0x09, which identifies the R10000 implementation of the floating point coprocessor.
- The Revision field is an 8-bit number that defines a particular revision of the floating point coprocessor. Since it can be arbitrarily changed, it is not defined here.
Figure 15-6 FP Implementation and Revision Register Format
Copyright 1996, 1997, MIPS Technologies, Inc. -- 09 DEC 96
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