18.6 Cache Test Mode Protocol
Normal Write Protocol
A cache test mode normal write operation writes a selected RAM array. The write address, way, array, and data are specified in the write command.
The external agent issues a normal write command by:
- driving the address on SysAD(57:46)
- driving the way on SysAD(45)
- negating the auto-increment select on SysAD(44)
- asserting the Write/Read select on SysAD(43)
- driving the array select on SysAD(42:40)
- driving the write data on SysAD(39:0)
- asserting SysVal* for one SysClk cycle
Normal writes have a repeat rate of 8 PClk cycles.
Figure 18-3 depicts two cache test mode normal writes.
Figure 18-3 Cache Test Mode Normal Write Protocol
Copyright 1996, 1997, MIPS Technologies, Inc. -- 09 DEC 96
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