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0|REACT&#8482; Real-Time Programmer's Guide|sgi_html/index.html
1|Front Matter|sgi_html/front.html
1|New Features in This Guide|sgi_html/pr01.html
2|New Features Documented|sgi_html/pr01.html#id5439374
1|About This Guide|sgi_html/pr02.html
2|Who This Guide Is For|sgi_html/pr02.html#id5178964
2|What This Guide Contains|sgi_html/pr02.html#id5179010
2|Related Publications and Sites|sgi_html/pr02.html#LE96700-PARENT
2|Obtaining Publications|sgi_html/pr02.html#id5179300
2|Conventions|sgi_html/pr02.html#id5179412
2|Reader Comments|sgi_html/pr02.html#id5179617
1|Chapter 1. Real-Time Programs|sgi_html/ch01.html
2|Defining Real-Time Programs|sgi_html/ch01.html#id5179762
2|Examples of Real-Time Applications|sgi_html/ch01.html#id5179804
3|Simulators|sgi_html/ch01.html#id5179954
4|Frame Rate|sgi_html/ch01.html#id5177353
4|Transport Delay|sgi_html/ch01.html#id5177414
4|Aircraft Simulators|sgi_html/ch01.html#id5177482
4|Ground Vehicle Simulators|sgi_html/ch01.html#id5177528
4|Plant Control Simulators|sgi_html/ch01.html#id5177586
4|Virtual Reality Simulators|sgi_html/ch01.html#id5177675
4|Hardware-in-the-Loop Simulators|sgi_html/ch01.html#id5177770
3|Data Collection Systems|sgi_html/ch01.html#id5177815
2|Real-Time Programming Languages|sgi_html/ch01.html#id5178036
1|Chapter 2. How IRIX and REACT/pro Support Real&#8211;Time Programs|sgi_html/ch02.html
2|Kernel Facilities for Real-Time Programs|sgi_html/ch02.html#LE93209-PARENT
3|Kernel Optimizations|sgi_html/ch02.html#id5178231
3|Special Scheduling Disciplines|sgi_html/ch02.html#id5178288
4|POSIX Real-Time Policies|sgi_html/ch02.html#id5178304
4|Gang Scheduling|sgi_html/ch02.html#id5178331
3|Locking Virtual Memory|sgi_html/ch02.html#id5178441
3|Mapping Processes and CPUs|sgi_html/ch02.html#id5178513
3|Controlling Interrupt Distribution|sgi_html/ch02.html#id5187678
2|REACT/pro Frame Scheduler|sgi_html/ch02.html#LE18698-PARENT
2|Synchronization and Communication|sgi_html/ch02.html#LE42590-PARENT
3|Shared Memory Segments|sgi_html/ch02.html#id5187945
3|Semaphores|sgi_html/ch02.html#LE30650-PARENT
3|Locks|sgi_html/ch02.html#LE22620-PARENT
3|Mutual Exclusion Primitives|sgi_html/ch02.html#id5188385
3|Signals|sgi_html/ch02.html#LE45686-PARENT
4|Signal Latency|sgi_html/ch02.html#id5188553
4|Signal Families|sgi_html/ch02.html#id5188589
2|Timers and Clocks|sgi_html/ch02.html#LE85496-PARENT
3|Hardware Cycle Counter|sgi_html/ch02.html#LE59558-PARENT
2|Interchassis Communication|sgi_html/ch02.html#LE78556-PARENT
3|Socket Programming|sgi_html/ch02.html#id5189333
3|Message-Passing Interface (MPI)|sgi_html/ch02.html#id5189385
3|Reflective Shared Memory|sgi_html/ch02.html#LE32787-PARENT
3|External Interrupts|sgi_html/ch02.html#LE53277-PARENT
1|Chapter 3. Controlling CPU Workload|sgi_html/ch03.html
2|Using Priorities and Scheduling Queues|sgi_html/ch03.html#LE76094-PARENT
3|Scheduling Concepts|sgi_html/ch03.html#LE54745-PARENT
4|Tick Interrupts|sgi_html/ch03.html#LE52834-PARENT
4|Time Slices|sgi_html/ch03.html#id5189885
4|Understanding the Real-Time Priority Band|sgi_html/ch03.html#LE41392-PARENT
3|Understanding Affinity Scheduling|sgi_html/ch03.html#LE25533-PARENT
3|Using Gang Scheduling|sgi_html/ch03.html#LE86141-PARENT
3|Changing the Time Slice Duration|sgi_html/ch03.html#id5190836
3|Controlling Kernel Threads|sgi_html/ch03.html#id5190929
2|Minimizing Overhead Work|sgi_html/ch03.html#LE48058-PARENT
3|Assigning the Clock Processor|sgi_html/ch03.html#LE38943-PARENT
3|Unavoidable Timer Interrupts|sgi_html/ch03.html#id5191500
3|Isolating a CPU from Sprayed Interrupts|sgi_html/ch03.html#LE50476-PARENT
3|Redirecting Interrupts|sgi_html/ch03.html#LE16684-PARENT
3|Understanding the Vertical Sync Interrupt|sgi_html/ch03.html#LE82053-PARENT
3|Restricting a CPU from Scheduled Work|sgi_html/ch03.html#LE87243-PARENT
4|Assigning Work to a Restricted CPU|sgi_html/ch03.html#LE43268-PARENT
3|Isolating a CPU from TLB Interrupts|sgi_html/ch03.html#LE74709-PARENT
4|Isolating a CPU When Performer Is Used|sgi_html/ch03.html#id5193419
3|Making a CPU Nonpreemptive|sgi_html/ch03.html#LE27459-PARENT
2|Minimizing Interrupt Response Time|sgi_html/ch03.html#LE71892-PARENT
3|Maximum Response Time Guarantee|sgi_html/ch03.html#LE23937-PARENT
3|Components of Interrupt Response Time|sgi_html/ch03.html#LE24810-PARENT
3|Hardware Latency|sgi_html/ch03.html#id5194125
3|Software Latency|sgi_html/ch03.html#id5194212
4|Kernel Critical Sections|sgi_html/ch03.html#LE96374-PARENT
3|Device Service Time|sgi_html/ch03.html#LE44094-PARENT
3|Dispatch User Thread|sgi_html/ch03.html#id5194548
3|Mode Switch|sgi_html/ch03.html#id5194567
3|Minimal Interrupt Response Time|sgi_html/ch03.html#id5194585
1|Chapter 4. Using the Frame Scheduler|sgi_html/ch04.html
2|Frame Scheduler Concepts|sgi_html/ch04.html#LE46755-PARENT
3|Frame Scheduler Basics|sgi_html/ch04.html#id5194865
3|Thread Programming Models|sgi_html/ch04.html#id5194976
3|Frame Scheduling|sgi_html/ch04.html#id5195013
4|The FRS Controller Thread|sgi_html/ch04.html#LE27151-PARENT
3|The Frame Scheduler API|sgi_html/ch04.html#LE95148-PARENT
3|Interrupt Information Templates|sgi_html/ch04.html#id5195768
4|Library Interface for C Programs|sgi_html/ch04.html#id5195925
4|System Call Interface for Fortran and Ada|sgi_html/ch04.html#id5197783
3|Thread Execution|sgi_html/ch04.html#id5198565
3|Scheduling Within a Minor Frame|sgi_html/ch04.html#LE74203-PARENT
4|Scheduler Flags frs_run and frs_yield|sgi_html/ch04.html#id5198989
4|Detecting Overrun and Underrun|sgi_html/ch04.html#id5199087
4|Estimating Available Time|sgi_html/ch04.html#id5199160
3|Synchronizing Multiple Schedulers|sgi_html/ch04.html#id5199220
3|Starting a Single Scheduler|sgi_html/ch04.html#id5199358
3|Starting Multiple Schedulers|sgi_html/ch04.html#LE71560-PARENT
3|Pausing Frame Schedulers|sgi_html/ch04.html#id5199558
3|Managing Activity Threads|sgi_html/ch04.html#LE44733-PARENT
2|Selecting a Time Base|sgi_html/ch04.html#LE12213-PARENT
3|On-Chip Timer Interrupt|sgi_html/ch04.html#id5200014
3|High-Resolution Timer|sgi_html/ch04.html#id5200077
3|Vertical Sync Interrupt|sgi_html/ch04.html#LE84592-PARENT
3|External Interrupts|sgi_html/ch04.html#LE21988-PARENT
3|Device Driver Interrupt|sgi_html/ch04.html#LE25121-PARENT
3|Software Interrupt|sgi_html/ch04.html#LE35769-PARENT
3|User-Level Interrupts|sgi_html/ch04.html#id5200620
2|Using the Scheduling Disciplines|sgi_html/ch04.html#LE97767-PARENT
3|Real-Time Discipline|sgi_html/ch04.html#id5200765
3|Background Discipline|sgi_html/ch04.html#id5200946
3|Underrunable Discipline|sgi_html/ch04.html#id5200985
3|Overrunnable Discipline|sgi_html/ch04.html#id5201041
3|Continuable Discipline|sgi_html/ch04.html#id5201142
3|Using Multiple Consecutive Minor Frames|sgi_html/ch04.html#LE16055-PARENT
2|Designing an Application for the Frame Scheduler|sgi_html/ch04.html#LE21771-PARENT
2|Preparing the System|sgi_html/ch04.html#LE37845-PARENT
2|Implementing a Single Frame Scheduler|sgi_html/ch04.html#LE48091-PARENT
2|Implementing Synchronized Schedulers|sgi_html/ch04.html#LE82868-PARENT
3|Synchronized Scheduler Concepts|sgi_html/ch04.html#id5202117
3|Implementing a Master Controller Thread|sgi_html/ch04.html#id5202199
3|Implementing Slave Controller Threads|sgi_html/ch04.html#id5202436
2|Handling Frame Scheduler Exceptions|sgi_html/ch04.html#LE43451-PARENT
3|Exception Types|sgi_html/ch04.html#id5202684
3|Exception Handling Policies|sgi_html/ch04.html#id5202753
4|Injecting a Repeat Frame|sgi_html/ch04.html#id5202808
4|Extending the Current Frame|sgi_html/ch04.html#id5202828
4|Dealing With Multiple Exceptions|sgi_html/ch04.html#id5202864
3|Setting Exception Policies|sgi_html/ch04.html#LE51755-PARENT
3|Querying Counts of Exceptions|sgi_html/ch04.html#id5203159
2|Using Signals Under the Frame Scheduler|sgi_html/ch04.html#LE72300-PARENT
3|Signal Delivery and Latency|sgi_html/ch04.html#LE54747-PARENT
3|Handling Signals in the FRS Controller|sgi_html/ch04.html#id5203500
3|Handling Signals in an Activity Thread|sgi_html/ch04.html#LE88749-PARENT
3|Setting Frame Scheduler Signals|sgi_html/ch04.html#LE54102-PARENT
3|Sequence Error|sgi_html/ch04.html#LE43574-PARENT
2|Using Timers with the Frame Scheduler|sgi_html/ch04.html#LE55284-PARENT
2|FRS Kernel-Level Device Driver Interface|sgi_html/ch04.html#LE38756-PARENT
3|Device Driver Overview|sgi_html/ch04.html#id5204400
3|Registering the Initialization and Termination Functions|sgi_html/ch04.html#LE76652-PARENT
3|Frame Scheduler Initialization Function|sgi_html/ch04.html#id5204676
3|Frame Scheduler Termination Function|sgi_html/ch04.html#id5204906
3|Generating Interrupts|sgi_html/ch04.html#LE38389-PARENT
1|Chapter 5. Optimizing Disk I/O for a Real-Time Program|sgi_html/ch05.html
2|Memory-Mapped I/O|sgi_html/ch05.html#LE13930-PARENT
2|Asynchronous I/O|sgi_html/ch05.html#LE50967-PARENT
3|Conventional Synchronous I/O|sgi_html/ch05.html#id5205464
3|Asynchronous I/O Basics|sgi_html/ch05.html#LE73732-PARENT
2|Guaranteed-Rate I/O (GRIO)|sgi_html/ch05.html#LE14806-PARENT
1|Chapter 6. Managing Device Interactions|sgi_html/ch06.html
2|Device Drivers|sgi_html/ch06.html#LE85724-PARENT
3|How Devices Are Defined|sgi_html/ch06.html#id5205875
3|How Devices Are Used|sgi_html/ch06.html#id5205954
4|Device Driver Entry Points|sgi_html/ch06.html#id5206036
3|Taking Control of Devices|sgi_html/ch06.html#id5206409
2|SCSI Devices|sgi_html/ch06.html#LE94299-PARENT
3|SCSI Adapter Support|sgi_html/ch06.html#id5206594
3|System Disk Device Driver|sgi_html/ch06.html#id5206625
3|System Tape Device Driver|sgi_html/ch06.html#id5206665
3|Generic SCSI Device Driver|sgi_html/ch06.html#LE10662-PARENT
3|CD-ROM and DAT Audio Libraries|sgi_html/ch06.html#id5207033
2|The PCI Bus|sgi_html/ch06.html#id5207109
2|The VME Bus|sgi_html/ch06.html#LE25650-PARENT
3|Challenge an Onyx Hardware Nomenclature|sgi_html/ch06.html#id5207319
3|VME Bus Attachments|sgi_html/ch06.html#id5207462
3|VME Address Space Mapping|sgi_html/ch06.html#id5208098
4|PIO Address Space Mapping|sgi_html/ch06.html#id5208212
4|DMA Mapping|sgi_html/ch06.html#LE74488-PARENT
3|Program Access to the VME Bus|sgi_html/ch06.html#LE78134-PARENT
4|PIO Access|sgi_html/ch06.html#LE50284-PARENT
4|User-Level Interrupt Handling|sgi_html/ch06.html#LE16935-PARENT
4|DMA Access to Master Devices|sgi_html/ch06.html#LE42290-PARENT
4|DMA Engine Access to Slave Devices|sgi_html/ch06.html#LE81572-PARENT
2|Serial Ports|sgi_html/ch06.html#LE73027-PARENT
2|External Interrupts|sgi_html/ch06.html#LE78160-PARENT
1|Chapter 7. Managing User-Level Interrupts|sgi_html/ch07.html
2|Overview of ULI|sgi_html/ch07.html#id5210886
3|The ULI Handler|sgi_html/ch07.html#id5210953
3|Restrictions on the ULI Handler|sgi_html/ch07.html#id5210999
3|Planning for Concurrency|sgi_html/ch07.html#id5211186
4|Debugging With Interrupts|sgi_html/ch07.html#id5211200
4|Declaring Global Variables|sgi_html/ch07.html#id5211230
3|Using Multiple Devices|sgi_html/ch07.html#id5211300
2|Setting Up|sgi_html/ch07.html#id5211379
3|Opening the Device Special File|sgi_html/ch07.html#id5211492
3|Locking the Program Address Space|sgi_html/ch07.html#id5211651
3|Registering the Interrupt Handler|sgi_html/ch07.html#id5211843
4|Registering an External Interrupt Handler|sgi_html/ch07.html#LE53522-PARENT
4|Registering a VME Interrupt Handler|sgi_html/ch07.html#id5212168
4|Registering a PCI Interrupt Handler|sgi_html/ch07.html#id5212298
3|Interacting With the Handler|sgi_html/ch07.html#LE99742-PARENT
4|Achieving Mutual Exclusion|sgi_html/ch07.html#id5212645
2|Sample Programs|sgi_html/ch07.html#id5212743
1|Appendix A. Sample Programs|sgi_html/apa.html
2|Basic Example|sgi_html/apa.html#LE29372-PARENT
3|Real-Time Application Specification|sgi_html/apa.html#id5213515
3|Frame Scheduler Design|sgi_html/apa.html#id5213543
2|Example of Scheduling Separate Programs|sgi_html/apa.html#LE83528-PARENT
2|Examples of Multiple Synchronized Schedulers|sgi_html/apa.html#LE24688-PARENT
3|Example of Device Driver|sgi_html/apa.html#id5214176
3|Examples of a 60 Hz Frame Rate|sgi_html/apa.html#id5214245
3|Example of Managing Lightweight Processes|sgi_html/apa.html#id5214311
3|The simple_pt Pthreads Program|sgi_html/apa.html#LE31744-PARENT
1|Glossary|sgi_html/go01.html
1|Index|sgi_html/ix01.html
# figures |
5|Figure 3-1. Real-Time Priority Band|sgi_html/ch03.html#id5190077
4|Figure 3-2. Components of Interrupt Response Time|sgi_html/ch03.html#id5194103
4|Figure 4-1. Major and Minor Frames|sgi_html/ch04.html#id5195196
4|Figure 6-1. Multiprocessor Challenge Data Path Components|sgi_html/ch06.html#id5207439
2|Figure 7-1. ULI Functional Overview|sgi_html/ch07.html#id5210848
4|Figure 7-2. ULI Handler Functions|sgi_html/ch07.html#id5211163
# tables |
5|Table 2-1. Signal Handling Interfaces|sgi_html/ch02.html#id5188635
5|Table 3-1. schedctl() Real-Time Priority Range Remapping|sgi_html/ch03.html#id5190169
5|Table 4-1. Frame Scheduler Operations|sgi_html/ch04.html#id5195945
5|Table 4-2. Frame Scheduler schedctl() Support|sgi_html/ch04.html#id5197853
4|Table 4-3. Signal Numbers Passed in frs_signal_info_t|sgi_html/ch04.html#id5203834
4|Table 6-1. Multiprocessor Challenge VME Cages and Slots|sgi_html/ch06.html#id5207493
4|Table 6-2. Power Channel-2 and VME bus Configurations|sgi_html/ch06.html#id5207780
5|Table 6-3. VME Bus PIO Bandwidth|sgi_html/ch06.html#id5208502
5|Table 6-4. VME Bus Bandwidth, VME Master Controlling DMA|sgi_html/ch06.html#id5208876
5|Table 6-5. VME Bus Bandwidth, DMA Engine, D32 Transfer (Challenge/Onyx Systems)|sgi_html/ch06.html#id5209533
5|Table 6-6. VME Bus Bandwidth, DMA Engine, D32 Transfer (Origin/Onyx 2 Systems)|sgi_html/ch06.html#id5209922
2|Table A-1. Summary of Frame Scheduler Example Programs|sgi_html/apa.html#id5213209
# examples |
4|Example 3-1. Initiating Gang Scheduling|sgi_html/ch03.html#LE16911-PARENT
4|Example 3-2. Setting the Time-Slice Length|sgi_html/ch03.html#LE12833-PARENT
4|Example 3-3. Setting the Clock CPU|sgi_html/ch03.html#LE60468-PARENT
4|Example 3-4. Number of Processors Available and Total|sgi_html/ch03.html#LE19416-PARENT
4|Example 3-5. Restricting a CPU|sgi_html/ch03.html#LE18518-PARENT
5|Example 3-6. Assigning the Calling Process to a CPU|sgi_html/ch03.html#LE61312-PARENT
4|Example 3-7. Making a CPU nonpreemptive|sgi_html/ch03.html#LE80538-PARENT
4|Example 4-1. Skeleton of an Activity Thread|sgi_html/ch04.html#LE40108-PARENT
4|Example 4-2. Alternate Skeleton of Activity Thread|sgi_html/ch04.html#LE41040-PARENT
4|Example 4-3. Function to Set INJECTFRAME Exception Policy|sgi_html/ch04.html#LE97483-PARENT
4|Example 4-4. Function to Set STRETCH Exception Policy|sgi_html/ch04.html#LE94737-PARENT
4|Example 4-5. Function to Return a Sum of Exception Counts (pthread Model)|sgi_html/ch04.html#LE48489-PARENT
4|Example 4-6. Function to Set Frame Scheduler Signals|sgi_html/ch04.html#LE72819-PARENT
3|Example 4-7. Minimal Activity Process as a Timer|sgi_html/ch04.html#LE24592-PARENT
4|Example 4-8. Exporting Device Driver Entry Points|sgi_html/ch04.html#LE10167-PARENT
4|Example 4-9. Device Driver Initialization Function|sgi_html/ch04.html#LE23314-PARENT
4|Example 4-10. Device Driver Termination Function|sgi_html/ch04.html#LE69181-PARENT
4|Example 4-11. Generating an Interrupt From a Device Driver|sgi_html/ch04.html#LE68912-PARENT
4|Example 4-12. Registering a Nonthreaded Interrupt Handler|sgi_html/ch04.html#LE34698-PARENT
3|Example 6-1. Memory Mapping With pciba|sgi_html/ch06.html#LE16688-PARENT
3|Example 7-1. Hypothetical PCI ULI Program|sgi_html/ch07.html#LE16544-PARENT
3|Example 7-2. Hypothetical External Interrupt ULI Program|sgi_html/ch07.html#LE26046-PARENT
# procedures |
# helpids |

