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## Index

address space
  functions that change
    Isolating a CPU from TLB Interrupts
  locking in memory
    Locking the Program Address Space
  of VME bus devices
    VME Address Space Mapping

affinity scheduling
  Understanding Affinity Scheduling

affinity value
  Understanding Affinity Scheduling

aircraft simulator
  Aircraft Simulators

asynchronous I/O
  Asynchronous I/O
  POSIX 1003.1b-1993
    Asynchronous I/O Basics

average data rate
  Data Collection Systems

brk()
  modifies address space
    Isolating a CPU from TLB Interrupts

bus
  assign interrupt to CPU
    Redirecting Interrupts

cache
  affinity scheduling
    Understanding Affinity Scheduling
  warming up in first frame
    Thread Execution

cacheflush()
  Isolating a CPU from TLB Interrupts

CD-ROM audio library
  CD-ROM and DAT Audio Libraries

CPU
  assign interrupt to
    Redirecting Interrupts
  assign process to
    Assigning Work to a Restricted CPU
  CPU 0 not used by Frame Scheduler
    Frame Scheduler Basics
  isolating from sprayed interrupts
    Isolating a CPU from Sprayed Interrupts
  isolating from TLB interrupts
    Isolating a CPU from TLB Interrupts
  making nonpreemptive
    Making a CPU Nonpreemptive
  restricting to assigned processes
    Mapping Processes and CPUs
    Restricting a CPU from Scheduled Work

cycle counter
  Hardware Cycle Counter
  as Frame Scheduler time base
    High-Resolution Timer
  drift rate of
    Hardware Cycle Counter
  precision of
    Hardware Cycle Counter

DAT audio library
  CD-ROM and DAT Audio Libraries

data collection system
  Examples of Real-Time Applications
  Data Collection Systems
  average data rate
    Data Collection Systems
  peak data rate
    Data Collection Systems
  requirements on
    Data Collection Systems

/dev/ei
  External Interrupts

device
  opening
    How Devices Are Used

device driver
  as Frame Scheduler time base
    FRS Kernel-Level Device Driver Interface
  entry points to
    Device Driver Entry Points
  for VME bus master
    DMA Access to Master Devices
  generic SCSI
    Generic SCSI Device Driver
  reference pages
    Device Driver Entry Points
  tape
    System Tape Device Driver

device service time
  Components of Interrupt Response Time
  Device Service Time

device special file
  for user-level interrupt
    Opening the Device Special File

dispatch cycle time
  Components of Interrupt Response Time

dlopen()
  Isolating a CPU from TLB Interrupts

DMA engine for VME bus
  DMA Engine Access to Slave Devices
  performance
    DMA Engine Access to Slave Devices

DMA mapping
  DMA Mapping

DMA to VME bus master devices
  DMA Access to Master Devices

dslib
  Generic SCSI Device Driver

DSO
  Isolating a CPU from TLB Interrupts

dynamic shared object. See DSO
  Isolating a CPU from TLB Interrupts

/etc/autoconfig command
  Redirecting Interrupts

external interrupt
  External Interrupts
  External Interrupts
  user-level handler
    Registering an External Interrupt Handler
  with Frame Scheduler
    External Interrupts

file descriptor
  of a device
    How Devices Are Used

frame interval
  Frame Rate

frame rate
  Frame Rate
  of plant control simulator
    Plant Control Simulators
  of virtual reality simulator
    Virtual Reality Simulators

Frame Scheduler
  REACT/pro Frame Scheduler
  Using the Frame Scheduler
  advantages
    REACT/pro Frame Scheduler
  and cycle counter
    High-Resolution Timer
  and external interrupt
    External Interrupts
  and the on-chip timer
    On-Chip Timer Interrupt
  and vertical sync
    Vertical Sync Interrupt
  background discipline
    Background Discipline
  continuable discipline
    Continuable Discipline
  CPU 0 not used by
    Frame Scheduler Basics
  design process
    Designing an Application for the Frame Scheduler
  device driver initialization
    Frame Scheduler Initialization Function
  device driver interface
    FRS Kernel-Level Device Driver Interface
  device driver interrupt
    Generating Interrupts
  device driver termination
    Frame Scheduler Termination Function
  device driver use
    Device Driver Overview
  example code
    Sample Programs
  exception handling
    Handling Frame Scheduler Exceptions
  FRS controller
    The FRS Controller Thread
    Synchronizing Multiple Schedulers
  frs_run flag
    Scheduler Flags frs_run and frs_yield
  frs_yield flag
    Scheduler Flags frs_run and frs_yield
  interface to
    The Frame Scheduler API
  interval timers not used with
    Using Timers with the Frame Scheduler
  major frame
    Frame Scheduling
  minor frame
    Frame Scheduling
  multiple synchronized
    Synchronizing Multiple Schedulers
  overrun exception
    Real-Time Discipline
    Exception Types
  overrunnable discipline
    Overrunnable Discipline
  pausing
    Pausing Frame Schedulers
  process outline for multiple
    Implementing Synchronized Schedulers
  process outline for single
    Implementing a Single Frame Scheduler
  real-time discipline
    Real-Time Discipline
  scheduling disciplines
    Using the Scheduling Disciplines
  scheduling rules of
    Scheduling Within a Minor Frame
  signals produced by
    Handling Signals in the FRS Controller
    Setting Frame Scheduler Signals
  software interrupt to
    Software Interrupt
  starting up
    Starting Multiple Schedulers
  thread structure
    Thread Execution
  time base selection
    Frame Scheduling
    Selecting a Time Base
  underrun exception
    Real-Time Discipline
    Exception Types
  underrunable discipline
    Underrunable Discipline
  using consecutive minor frames
    Using Multiple Consecutive Minor Frames
  warming up cache
    Thread Execution

FRS controller
  The FRS Controller Thread
  Synchronizing Multiple Schedulers
  receives signals
    Setting Frame Scheduler Signals

frs_create()
  Implementing a Single Frame Scheduler

frs_create_master()
  Implementing a Master Controller Thread
  Registering the Initialization and Termination Functions

frs_create_slave()
  Implementing Slave Controller Threads

frs_destroy()
  Implementing a Single Frame Scheduler
  Implementing a Master Controller Thread
  Implementing Slave Controller Threads

frs_driver_export()
  Registering the Initialization and Termination Functions

frs_enqueue()
  Implementing a Single Frame Scheduler

frs_getattr()
  Querying Counts of Exceptions

frs_handle_driverintr()
  Generating Interrupts

frs_join()
  Thread Execution
  Starting Multiple Schedulers
  Implementing a Master Controller Thread
  Implementing Slave Controller Threads

frs_premove()
  Handling Signals in an Activity Thread

frs_pthread_enqueue()
  Scheduling Within a Minor Frame
  Using the Scheduling Disciplines
  Implementing a Single Frame Scheduler
  Implementing a Master Controller Thread
  Implementing Slave Controller Threads

frs_pthread_getattr()
  Querying Counts of Exceptions

frs_pthread_remove()
  Handling Signals in an Activity Thread

frs_pthread_setattr()
  Setting Exception Policies
  example code
    Setting Exception Policies
    Setting Exception Policies

frs_resume()
  Pausing Frame Schedulers

frs_setattr()
  Setting Exception Policies

frs_start()
  Starting Multiple Schedulers
  Implementing a Single Frame Scheduler
  Implementing a Master Controller Thread
  Implementing Slave Controller Threads

frs_stop()
  Pausing Frame Schedulers

frs_userintr()
  Software Interrupt

frs_yield
  Thread Execution

frs_yield()
  with overrunable discipline
    Overrunnable Discipline

gang scheduling
  Gang Scheduling
  Using Gang Scheduling

GRIO. See guaranteed-rate I/O
  Guaranteed-Rate I/O (GRIO)

ground vehicle simulator
  Ground Vehicle Simulators

guaranteed-rate I/O
  Guaranteed-Rate I/O (GRIO)

hardware latency
  Components of Interrupt Response Time
  Hardware Latency

hardware simulator
  Hardware-in-the-Loop Simulators

interchassis communication
  Interchassis Communication

interrupt
  assign to CPU
    Redirecting Interrupts
  controlling distribution of
    Controlling Interrupt Distribution
  external. See external interrupt
    External Interrupts
  group. See interrupt group
    Selecting a Time Base
  isolating CPU from
    Isolating a CPU from Sprayed Interrupts
  propogation delay
    Hardware Latency
  response time. See interrupt response time
    Minimizing Interrupt Response Time
  spraying
    Isolating a CPU from Sprayed Interrupts
  TLB
    Isolating a CPU from TLB Interrupts
  vertical sync
    Understanding the Vertical Sync Interrupt
    Vertical Sync Interrupt
  See also user-level interrupt (ULI)
    Managing User-Level Interrupts

interrupt group
  Selecting a Time Base
  Frame Scheduler passes to device driver
    Frame Scheduler Initialization Function

interrupt response time
  Minimizing Interrupt Response Time
  200 microsecond guarantee
    Maximum Response Time Guarantee
  components
    Components of Interrupt Response Time
  device service time
    Device Service Time
  hardware latency
    Hardware Latency
  kernel service not guaranteed
    Kernel Critical Sections
  restrictions on processes
    Kernel Critical Sections
  software latency
    Software Latency

interrupts
  unavoidable from timer
    Unavoidable Timer Interrupts

interval timer
  not used with Frame Scheduler
    Using Timers with the Frame Scheduler

ioctl()
  and device driver
    Device Driver Entry Points

IPL statement
  Redirecting Interrupts

IRIS InSight
  About This Guide

IRIX functions
  ioctl()
    Registering an External Interrupt Handler
  mlock()
    Locking the Program Address Space
  mlockall()
    Locking the Program Address Space
  mpin()
    Locking the Program Address Space
  test_and_set()
    Achieving Mutual Exclusion
  ULI_block_intr()
    Achieving Mutual Exclusion
  ULI_register_ei()
    Registering an External Interrupt Handler
  ULI_register_pci()
    Registering a PCI Interrupt Handler
  ULI_register_vme()
    Registering a VME Interrupt Handler
  ULI_sleep()
    Using Multiple Devices
    Interacting With the Handler
  ULI_wakeup()
    Interacting With the Handler

irix.sm configuration file
  Redirecting Interrupts

kernel
  affinity scheduling
    Understanding Affinity Scheduling
  critical section
    Kernel Critical Sections
  gang scheduling
    Using Gang Scheduling
  interrupt response time
    Software Latency
  originates signals
    Signals
  real-time features
    Kernel Facilities for Real-Time Programs
  scheduling
    Scheduling Concepts
  threads
    Controlling Kernel Threads
  tick
    Tick Interrupts
  time slice
    Tick Interrupts

latency
  hardware
    Components of Interrupt Response Time
    Hardware Latency
  software
    Components of Interrupt Response Time
    Software Latency

libc reentrant version
  Declaring Global Variables

lock
  Locks
  defined
    Locks
  effect of gang scheduling
    Using Gang Scheduling
  set by spinning
    Locks

locking memory
  Locking the Program Address Space

locking virtual memory
  Locking Virtual Memory

major frame
  Frame Scheduling

MAP_AUTOGROW flag
  Isolating a CPU from TLB Interrupts

MAP_LOCAL flag
  Isolating a CPU from TLB Interrupts

memory
  shared. See shared memory
    Shared Memory Segments

memory mapping
  for I/O
    Memory-Mapped I/O

minor frame
  Frame Scheduling
  Scheduling Within a Minor Frame

mmap()
  Isolating a CPU from TLB Interrupts

mpadmin command
  assign clock processor
    Assigning the Clock Processor
  make CPU nonpreemptive
    Making a CPU Nonpreemptive
  restrict CPU
    Restricting a CPU from Scheduled Work
  unrestrict CPU
    Restricting a CPU from Scheduled Work

mprotect()
  Isolating a CPU from TLB Interrupts

multiprocessor architecture
  affinity scheduling
    Understanding Affinity Scheduling
  and Frame Scheduler
    Synchronizing Multiple Schedulers

munmap()
  Isolating a CPU from TLB Interrupts

mutual exclusion primitive
  Mutual Exclusion Primitives

NOINTR statement
  Isolating a CPU from Sprayed Interrupts

open()
  of a device
    How Devices Are Used

operator
  affected by transport delay
    Transport Delay
  in virtual reality simulator
    Virtual Reality Simulators
  of simulator
    Simulators

overrun in data collection system
  Data Collection Systems

overrun in Frame Scheduler
  Real-Time Discipline

page fault
  causes TLB interrupt
    Isolating a CPU from TLB Interrupts
  prevent by locking memory
    Locking Virtual Memory

PCI bus
  The PCI Bus
  user-level interrupt handler for
    Registering a PCI Interrupt Handler

peak data rate
  Data Collection Systems

PIO access to VME devices
  PIO Access

PIO address mapping
  PIO Address Space Mapping

plant control simulator
  Plant Control Simulators

power plant simulator
  Plant Control Simulators

priority
  Understanding the Real-Time Priority Band

process
  assign to CPU
    Assigning Work to a Restricted CPU
  mapping to CPU
    Mapping Processes and CPUs
  time slice
    Time Slices

process control
  Examples of Real-Time Applications

process group
  Gang Scheduling
  and gang scheduling
    Using Gang Scheduling

propagation delay. See hardware latency
  Hardware Latency

pset command
  and restricted CPU
    Restricting a CPU from Scheduled Work

pthread_attr_init()
  Implementing a Single Frame Scheduler

pthread_attr_setscope()
  Implementing a Single Frame Scheduler

REACT
  About This Guide

REACT/Pro
  About This Guide

read()
  and device driver
    Device Driver Entry Points

real-time application
  data collection
    Examples of Real-Time Applications
    Data Collection Systems
  frame rate
    Simulators
  process control
    Examples of Real-Time Applications
  simulator
    Examples of Real-Time Applications
    Simulators
  types of
    Real-Time Programs

real-time priority band
  Understanding the Real-Time Priority Band

real-time program
  and Frame Scheduler
    REACT/pro Frame Scheduler
  defined
    Defining Real-Time Programs
  disk I/O by
    Optimizing Disk I/O for a Real-Time Program

reentrant C library
  Declaring Global Variables

reflective shared memory
  Reflective Shared Memory

response time. See interrupt response time
  Minimizing Interrupt Response Time

restricting a CPU
  Restricting a CPU from Scheduled Work

runon command
  Assigning Work to a Restricted CPU

schedctl()
  Using Gang Scheduling
  Assigning Work to a Restricted CPU
  example code
    Using Gang Scheduling
  with Frame Scheduler
    System Call Interface for Fortran and Ada

scheduling
  Scheduling Concepts
  affinity type
    Understanding Affinity Scheduling
  gang type
    Gang Scheduling
    Using Gang Scheduling

scheduling discipline
  See also Frame Scheduler scheduling disciplines
    Using the Scheduling Disciplines

SCSI interface
  SCSI Devices
  generic device driver
    Generic SCSI Device Driver

semaphore
  Semaphores
  defined
    Semaphores

sginap()
  Locks

shared memory
  Shared Memory Segments
  reflective
    Reflective Shared Memory

shmctl()
  Isolating a CPU from TLB Interrupts

shmget()
  Isolating a CPU from TLB Interrupts

signal
  Signals
  delivery priority
    Signal Families
  latency
    Signal Delivery and Latency
  signal numbers
    Signal Families
  SIGUSR1
    Setting Frame Scheduler Signals
  SIGUSR2
    Setting Frame Scheduler Signals
  with Frame Scheduler
    Using Signals Under the Frame Scheduler

signal handler
  when setting up Frame Scheduler
    Implementing a Master Controller Thread
    Implementing Slave Controller Threads

SIGRTMIN on dequeue
  Setting Frame Scheduler Signals

SIGUSR1
  on underrun
    Setting Frame Scheduler Signals

SIGUSR2
  on overrun
    Setting Frame Scheduler Signals

simulator
  Examples of Real-Time Applications
  Simulators
  aircraft
    Aircraft Simulators
  control inputs to
    Simulators
    Plant Control Simulators
  frame rate of
    Simulators
    Plant Control Simulators
  ground vehicle
    Ground Vehicle Simulators
  hardware
    Hardware-in-the-Loop Simulators
  operator of
    Simulators
  plant control
    Plant Control Simulators
  state display
    Simulators
  virtual reality
    Virtual Reality Simulators
  world model in
    Simulators

sockets
  Socket Programming

software latency
  Components of Interrupt Response Time
  Software Latency

spin lock
  Locks

sproc()
  CPU assignment inherited
    Assigning Work to a Restricted CPU
  modifies address space
    Isolating a CPU from TLB Interrupts

sprocsp()
  Isolating a CPU from TLB Interrupts

synchronization and communication
  Synchronization and Communication

sysmp()
  Assigning Work to a Restricted CPU
  assign process to CPU
    Assigning Work to a Restricted CPU
  example code
    Restricting a CPU from Scheduled Work
    Assigning the Clock Processor
    Restricting a CPU from Scheduled Work
    Assigning Work to a Restricted CPU
    Making a CPU Nonpreemptive
  isolate TLB interrupts
    Isolating a CPU from TLB Interrupts
  make CPU nonpreemptive
    Making a CPU Nonpreemptive
  number of CPUs
    Restricting a CPU from Scheduled Work
  restrict CPU
    Restricting a CPU from Scheduled Work
    Restricting a CPU from Scheduled Work
  run process on any CPU
    Assigning Work to a Restricted CPU

sys/param.h
  Tick Interrupts

tape device
  System Tape Device Driver

telemetry
  Examples of Real-Time Applications

test_and_set
  Mutual Exclusion Primitives

thread
  FRS controller
    The FRS Controller Thread

tick
  Tick Interrupts
  disabling
    Making a CPU Nonpreemptive

time base for Frame Scheduler
  Selecting a Time Base

time slice
  Tick Interrupts

timer interrupts unavoidable
  Unavoidable Timer Interrupts

TLB update interrupt
  Isolating a CPU from TLB Interrupts

transport delay
  Transport Delay

udmalib
  DMA Engine Access to Slave Devices

underrun, in Frame Scheduler
  Real-Time Discipline

user-level interrupt (ULI)
  Managing User-Level Interrupts
  and debugging
    Debugging With Interrupts
  external interrupt with
    Registering an External Interrupt Handler
  initializing
    Setting Up
  interrupt handler function
    The ULI Handler
  PCI interrupt with
    Registering a PCI Interrupt Handler
  registration
    Registering the Interrupt Handler
  restrictions on handler
    Restrictions on the ULI Handler
  ULI_block_intr() function
    Achieving Mutual Exclusion
  ULI_register_ei () function
    Registering an External Interrupt Handler
  ULI_register_pci() function
    Registering a PCI Interrupt Handler
  ULI_register_vme () function
    Registering a VME Interrupt Handler
  ULI_sleep () function
    Using Multiple Devices
    Interacting With the Handler
  ULI_wakeup () function
    Interacting With the Handler
  VME interrupt with
    Registering a VME Interrupt Handler

vertical sync interrupt
  Understanding the Vertical Sync Interrupt
  Vertical Sync Interrupt

virtual memory
  locking
    Locking Virtual Memory

virtual reality simulator
  Virtual Reality Simulators

VME bus
  The VME Bus
  address space mapping
    VME Address Space Mapping
  configuration
    VME Bus Attachments
  DMA mapping
    DMA Mapping
  DMA to master devices
    DMA Access to Master Devices
  performance
    PIO Access
    DMA Access to Master Devices
    DMA Engine Access to Slave Devices
  PIO access
    PIO Access
  PIO address mapping
    PIO Address Space Mapping
  udmalib
    DMA Engine Access to Slave Devices
  user-level interrupt handler for
    Registering a VME Interrupt Handler

volatile keyword
  Declaring Global Variables

write()
  and device driver
    Device Driver Entry Points

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