The state of a Sequence Initiator until all the Data frames for the Sequence have been transmitted. The state of a Sequence Recipient until all the Data frames for the Sequence have been received.
An address value used to identify source (S_ID) or destination (D_ID) of a frame.
One or more address identifiers which may be recognized by an N_Port in addition to its N_Port Identifier. An alias address identifier is Fabric unique and may be common to multiple N_Ports.
The transmission medium power loss expressed in units of dB.
The optical power measured using an average reading power meter when the fibre channel is transmitting a specified code sequence as defined in the test procedure.
Copper cable-to-electrical converter module. A C/E module can be used in conjunction with an MIA module option to provide a common physical footprint so that the copper or optical options do not need to be factory configured. See MIA.
Classes of fibre channel connection:
Class 1 provides a dedicated connection between 2 N_Ports. Class 1 provides end-to-end flow control, buffer-to-buffer flow control, and frame acknowledgments, with in-order-of-frame delivery guaranteed.
Class 2 is a frame-switched, connectionless service allowing bandwidth to be shared by multiplexing frames from multiple sources onto the same channel. Class 2 provides end-to-end flow control, buffer-to-buffer flow control, and frame acknowledgments, but in-order-of-frame delivery is not guaranteed.
Class 3 is similar to class 2 except there is no end-to-end flow control or delivery acknowledgments.
In copper cables, equalization can be used to compensate for high-frequency losses by attenuating lower frequencies to match the loss of higher frequencies. Equalization is applied at the receiving end of a signal, and is typically tuned to the cable length and data rate. Cables that have been equalized should not be connected to other cables.
An exchange is composed of one or more nonconcurrent sequences for a single operation. The exchanges can be unidirectional or bidirectional between two N_Ports. Within a single exchange, only one sequence can be active at any one time, but sequences of different exchanges can be concurrently active.
The Fast 20 SCSI parallel interface, which can burst data at 40 MB/sec. Also known as Ultra SCSI and Hyper SCSI.
A fibre channel fabric is implemented by switches connecting F_Ports. A nonblocking switch that allows full connectivity between ports. An FC fabric allows different classes of service (Classes 1, 2, 3).
Fibre Channel Arbitrated Loop, a low-cost implementation of fibre channel for connecting disk drives in a loop.
Fibre channel physical (hardware) interface, which includes FC-0, FC-1, and FC-2.
Fibre channel physical interface, that is, media type, electrical and optical characteristics, connectors, cables, and so on.
Defines the fibre channel transmission protocol, including 8b/10b encoding, error detection.
Defines the fibre channel framing protocol.
Defines the fibre channel common services, for example, striping, hunt groups, multicast.
Defines the fibre channel upper-layer protocol, that is, SCSI-3.
The basic building block of an FC connection, a frame contains the information to be transmitted, the address of the source and destination ports, and link control information. Frames are of two types, Data frames and Link_control frames. Data frames can be used as Link_Data frames and Device_Data frames. Link_control frames are classified as Acknowledge (ACK) and Link_Response (Busy and Reject) frames.
Fibre channel is a general term used to refer to the fibre channel interface standard as a whole, and includes FC-PH, FC-AL, and FC 0-4. The word Fibre is used as a generic term which can indicate copper or optical implementations of fibre channel products.
A hub provides a physical star topology while maintaining a logical loop that provides minimal disruption to the loop in the event of a host failure or during reconfiguration.
Loop Redundancy Circuit. See PBE.
Media interface adapter module (also referred to as a media shifter, optical-to-electrical converter, or O/E). An MIA module converts photons to electrons in one direction, and converts electrons to photons in the other direction.
A fibre channel enclosure with an intelligent storage processor (SP) controller board that supports RAID operations. Available as a rackmount enclosure or deskside (tower).
A fibre channel chassis a disks only (disk array enclosure) with no controllers. It is not a RAID enclosure. Available as a standalone deskside (tower) unit or as a chassis mountable in the fibre channel rack or the Origin and Onyx2 rack.
Port Bypass Enable (also known as Loop Redundancy Circuit (LRC)). A high-speed multiplexer which is used to bypass a failed or not present disk drive in a disk enclosure. A PBE typically redrives but does not retime the signals, which adds a small amount of jitter. PBEs are controlled by a port bypass enable signal, which is normally provided by a disk drive (or the lack of a disk drive) or an environmental interface.
The fibre channel SCA (Single Connector Attach) connector is a 40 pin connector that is used for connecting disk drives directly to a backplane. This connector features a ground mate first connection for hot plug support, and blind mate features. All power, ground, dual interface, addressing, and option support pins are provided in one connector. This connector is similar to the 80 pin SCSI SCA connector.
SCSI 3 refers to the new SCSI architecture, which includes Parallel SCSI, SSA, or fibre channel.
Transmission between fibre channel buffers. A sequence is formed by a set of one or more related frames transmitted unidirectionally from one N_Port to an other. Each frame within a sequence is uniquely numbered with a sequence count. Error recovery, which is controlled by an upper protocol layer, is usually performed at sequence boundaries.
Serial Storage Architecture. SSA is an emerging serial storage interface promoted by IBM which is a 20 MB/sec native interface, soon to be doubled to 40 MB/sec.
An FC-3 common service, striping is multiplying bandwidth using multiple N_Ports in parallel to transmit a single information unit across multiple links. Not yet implemented.
Ports for
N_Port: can be connected to a node only
L_Port: can be connected to a loop only
F_Port: can be connected to a fabric only
NL_Port: can be connected to either a node or a loop
FL_Port: can be connected to either a fabric or a loop
The XIO bus consists of two unidirectional 400 MHz source synchronous 8-bit (400 MB), or 16 bit (800 MB) buses. Although the Bridge ASIC can be connected to a 8- or 16-bit Crosstalk bus, the bus itself uses only 8 bits.