PDP-11/05, 11/10 Computer Manual

Company:Digital Equipment Corporation
Part:EK-11005-TM-003
Date:1975-04
Keywords:

Table of Contents

  • Part 1 Computer Description
  • Chapter 1 Computer Components
    • 1.1 Introduction
    • 1.2 Computer Components
      • 1.2.1 KD11-B Processor
      • 1.2.2 Core Memory
        • 1.2.2.1 Memory Organization
        • 1.2.2.2 Memory Specification
      • 1.2.3 Power Supply
      • 1.2.4 Backplane
    • 1.3 ME11-L Core Memory System
    • 1.4 Extension Mounting Box
  • Chapter 2 Unibus
    • 2.1 Introduction
    • 2.2 Unibus Structure
      • 2.2.1 Bidirectional Lines
      • 2.2.2 Master/Slave Relationship
      • 2.2.3 Interlocked Communication
    • 2.3 Peripheral Device Organization and Control
    • 2.4 Unibus Control Arbitration
      • 2.4.1 Priority Transfer Requests
      • 2.4.2 Processor Interrupts
      • 2.4.3 Data Transfers
  • Chapter 3 Unpacking and Installation
    • 3.1 Introduction
    • 3.2 Unpacking
    • 3.3 Mechanical Description
    • 3.4 Installation
      • 3.4.1 Mounting Computer on Installed Slides
      • 3.4.2 Securing Computer to Cabinet Rack
      • 3.4.3 Installation of I/O Cables
    • 3.5 Interchangeable Peripheral Slots
    • 3.6 Side and Top Cover Installations
    • 3.7 AC Power Supply Connection
      • 3.7.1 Connecting to Voltages Other than 115 V
      • 3.7.2 Quality of AC Power Source
    • 3.8 Cabinet Power Control
    • 3.9 Installation Certification
    • 3.10 Warranty Service (Domestic Only)
  • Chapter 4 Computer Operation
    • 4.1 Introduction
    • 4.2 Power Switch Operation
    • 4.3 Function Switches
    • 4.4 Address/Data Switches
    • 4.5 Console Indicators
    • 4.6 Console Operation
      • 4.6.1 Load Address Switch
      • 4.6.2 Examine Switch
      • 4.6.3 Deposit Switch
      • 4.6.4 ENABLE/HALT Switch
      • 4.6.5 START Switch
      • 4.6.6 Continue Switch
    • 4.7 Unconditional Computer and Unibus Initialization
    • 4.8 Loading Programs from Paper Tape
      • 4.8.1 The Bootstrap Loader
        • 4.8.1.1 Loading the Loader Into Memory
        • 4.8.1.2 Loading Bootstrap Tapes
        • 4.8.1.3 Bootstrap Loader Operation
      • 4.8.2 The Absolute Loader
        • 4.8.2.1 Loading the Loader Into Memory
        • 4.8.2.2 Loading Absolute Tapes
      • 4.8.3 Memory Dumps
        • 4.8.3.1 Operating Procedures
        • 4.8.3.2 Output Formats
        • 4.8.3.3 Storage Maps
  • Part 2 KD11-B Processor
  • Chapter 5 Processor General Description
    • 5.1 KD11-B Definition
    • 5.2 KD11-B and the Unibus
    • 5.3 KD11-B as an Instruction Interpreter
    • 5.4 Medium and Large Scale Integrated Circuit Representations
      • 5.4.1 Microprogram Documentation
      • 5.4.2 Read-Only Memory (ROM) Maps
  • Chapter 6 Instruction Set
    • 6.1 Introduction
    • 6.2 Addressing Modes
      • 6.2.1 Introduction
      • 6.2.2 Instruction Timing
    • 6.3 PDP-11/05 Instructions
    • 6.4 Instruction Set Differences
  • Chapter 7 Console Description (See the KD11-B Processor Maintenance Manual)
  • Chapter 8 KD11-B Detailed Description (See the KD11-B Processor Maintenance Manual)
  • Chapter 9 Microprogram Control (See the KD11-B Processor Maintenance Manual)
  • Chapter 10 KD11-B and Console Maintenance (See the KD11-B Processor Maintenance Manual)
  • Part 3 MM11-K and MM11-L Memories
  • Chapter 11 MM11-K and L General Description
    • 11.1 Introduction
    • 11.2 General Description
      • 11.2.1 Physical Description
      • 11.2.2 Specifications
      • 11.2.3 Functional Description
        • 11.2.3.1 G110 Control Module
        • 11.2.3.2 G231 Driver Module
        • 11.2.3.3 H213 or H214 Stack Module
      • 11.2.4 Basic Memory Operation
        • 11.2.4.1 Data In (DATI) Cycle
        • 11.2.4.2 Data In, Pause (DATIP) Cycle
        • 11.2.4.3 Data Out (DATO) Cycle
        • 11.2.4.4 Data Out, Byte (DATOB) Cycle
  • Chapter 12 MM11-K and L Detailed Description
    • 12.1 Introduction
    • 12.2 Core Array
    • 12.3 Memory Operation
    • 12.4 Device and Word Selection
      • 12.4.1 Memory Organization and Addressing Conventions
      • 12.4.2 Device Selector
      • 12.4.3 Word Selection
        • 12.4.3.1 Word Address Register and Gating Logic
        • 12.4.3.2 X- and Y-Line Decoding
        • 12.4.3.3 Drivers and Switches
        • 12.4.3.4 Word Address Decoding and Selection Sequence
    • 12.5 Read/Write Current Generation and Sensing
      • 12.5.1 Read/Write Operation
      • 12.5.2 X- and Y-Current Generators
      • 12.5.3 Inhibit Driver
      • 12.5.4 Sense Amplifier
      • 12.5.5 Memory Data Register
    • 12.6 Stack Discharge Circuit
    • 12.7 DC LO Circuit
    • 12.8 Operating Mode Selection Logic
    • 12.9 Control Logic
      • 12.9.1 Timing Circuit
      • 12.9.2 Slave Synchronization (SSYN) Circuit
      • 12.9.3 Pause/Write Restart Circuit
      • 12.9.4 Strobe Generating Circuit
      • 12.9.5 Data In (DATI) Operation
      • 12.9.6 Data In Pause (DATIP) Operation
      • 12.9.7 Data Out (DATO) Operation
      • 12.9.8 Data Out Byte (DATOB) Operation
  • Chapter 13 Memory Maintenance
    • 13.1 Introduction
    • 13.2 Preventive Maintenance
      • 13.2.1 Initial Procedures
      • 13.2.2 Checking Output of Current Generators
    • 13.3 Corrective Maintenance
      • 13.3.1 Strobe Delay Check and Adjustment
      • 13.3.2 Corrective Maintenance Aids
    • 13.4 Programming Tests
      • 13.4.1 Address Test Up (MAINDEC-11-DIAA)
      • 13.4.2 Address Test Down (MAINDEC-11-DIBA)
      • 13.4.3 No Dual Address Test (MAINDEC-11-DICA)
      • 13.4.4 Basic Memory Patterns Test (MAINDEC-11-DIDA)
      • 13.4.5 Worst-Case Noise Test (MAINDEC-11-DIGA)
  • Part 4 Power Supply
  • Chapter 14 Power Supply General Description
    • 14.1 Introduction
    • 14.2 Physical Description
      • 14.2.1 Power Control Unit
      • 14.2.2 Power Chassis Assembly
      • 14.2.3 DC Regulator Module
      • 14.2.4 DC Cable
      • 14.2.5 AC Cable
    • 14.3 Specifications
  • Chapter 15 Power Supply Detailed Description
    • 15.1 Introduction
    • 15.2 AC Input Circuit
    • 15.3 DC Regulator Module Operation
      • 15.3.1 Generation of ± Raw DC
      • 15.3.2 LTC L Circuit
      • 15.3.3 BUS AC LO L and BUS DC LO L Circuits
      • 15.3.4 +15 V Regulator Circuit
      • 15.3.5 +5 V Regulator Circuit
      • 15.3.6 -15 V Regulator Circuit
  • Chapter 16 Power Supply Maintenance
    • 16.1 Introduction
    • 16.2 Adjustments
    • 16.3 Circuit Waveforms
    • 16.4 Troubleshooting
      • 16.4.1 Troubleshooting Rules
      • 16.4.2 Troubleshooting Hints
      • 16.4.3 Troubleshooting Chart
    • 16.5 Parts Identification
  • Part 5 10½ Inch Mounting Box and Power System
  • Chapter 17 Mounting Box
    • 17.1 Introduction
    • 17.2 Overall Mechanical Description
    • 17.3 Backplane
    • 17.4 Power System
  • Chapter 18 10½ Inch Mounting Box Unpacking and Installation
    • 18.1 Introduction
    • 18.2 Unpacking
    • 18.3 Installation in a Cabinet
    • 18.4 Installation of Options and Cables
      • 18.4.1 Installing Options on Site
      • 18.4.2 Connecting the Serial Communications Device to the Processor
      • 18.4.3 Console Cable
      • 18.4.4 Unibus Cable/Jumper
    • 18.5 AC Power Supply Connection
      • 18.5.1 Connecting to Voltages Other than 115 V
      • 18.5.2 Quality of AC Power Source
    • 18.6 Cabinet Power Control
      • 18.6.1 Introduction
      • 18.6.2 Typical Multi-Cabinet Installation
    • 18.7 Installation Certification
    • 18.8 Warranty Service (Domestic Only)
  • Chapter 19 Power System
    • 19.1 Introduction
    • 19.2 Mechanical Description
      • 19.2.1 Power Supply
        • 19.2.1.1 DC Regulator
        • 19.2.1.2 +5 V Regulator
      • 19.2.2 Line Set
      • 19.2.3 Wiring Harnesses
    • 19.3 System Functional Description
    • 19.4 System Circuit Description
      • 19.4.1 Introduction
      • 19.4.2 Line Set
      • 19.4.3 Power Distribution Board
      • 19.4.4 DC Regulator (PS1)
        • 19.4.4.1 Functional Operation
        • 19.4.4.2 Generation of Raw DC Voltages
        • 19.4.4.3 LTC L Circuit
        • 19.4.4.4 BUS AC LO L and BUS DC LO L Circuits
        • 19.4.4.5 +15 V Regulator Circuit
        • 19.4.4.6 +5 V Regulator Circuit
        • 19.4.4.7 -15 V Regulator Circuit
      • 19.4.5 +5 V Regulator (PS2)
        • 19.4.5.1 Functional Operation
        • 19.4.5.2 Generation of Raw DC Voltage
        • 19.4.5.3 Regulator Circuit
        • 19.4.5.4 Overcurrent Protection Circuit
        • 19.4.5.5 Overvoltage Crowbar Circuit
    • 19.5 Power Supply Maintenance
      • 19.5.1 Introduction
      • 19.5.2 Checking and Adjusting Voltages
      • 19.5.3 Power Supply Removal
      • 19.5.4 Troubleshooting Procedures
        • 19.5.4.1 Introduction
        • 19.5.4.2 Troubleshooting Hints
        • 19.5.4.3 Troubleshooting the 5409728 Regulator
        • 19.5.4.4 Troubleshooting the H744 Regulator
  • Appendix A Integrated Circuit Descriptions
  • Appendix B Computer Connectors

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