VT100 Series Technical Manual

Company:Digital Equipment Corporation
Part:EK-VT100-TM-002
Date:1980-09
Keywords:terminal
Supersedes:
Superseded by:

Table of Contents

  • Chapter 1 Introduction and Specifications
    • VT100 Specifications
    • Ordering Hardware Documentation
      • Related Documentation
  • Chapter 2 Operator Information
    • Part 1 Keyboard Controls and Indicators
      • Numeric Keypad
      • Monitor Control
      • Audible Indicators (Tones)
    • Part 2 SET-UP Mode
      • SET-UP Features
      • SET-UP A
      • SET-UP B
      • Determining What a SET-UP Feature Does
      • How to Change a SET-UP Feature
      • Setting the Answerback Message
      • Saving SET-UP Features
      • Recalling SET-UP Features
      • Resetting the Terminal
    • Part 3 Definitions of SET-UP Features
      • ANSI/VT52 Mode
      • Answerback Message
      • Auto Repeat
      • Auto XON/XOFF
      • Bits per Character
      • Characters per Line
      • Cursor
      • Interlace
      • Keyclick Tone
      • LINE/LOCAL
      • Margin Bell
      • New Line
      • Parity
      • Parity Sense
      • Power
      • Receive Speed
      • Screen Background
      • Screen Brightness
      • Scroll
      • Tabs
      • Transmit Speed
      • Wraparound
    • Part 4 Self-Testing the VT100
      • Self-Test Error Codes
    • Part 5 What To Do in the Event of a Problem
  • Chapter 3 Installation and Interface Information
    • Site Considerations
    • Unpacking and Installation
    • User Maintenance
    • Interface Information
      • EIA Interface
      • Electrical Characteristics
        • VT100 Output Voltages
        • VT100 Input Voltages
        • Optional 20 mA Current Loop Interface
      • External Video Connections
      • Composite Video Output (J9)
      • Video Input (J8)
  • Chapter 4 Technical Description
    • 4.1 Introduction to VT100 Technical Description
      • 4.1.1 Scope of Chapter
      • 4.1.2 Order of Presentation
      • 4.1.3 Definition of Terms and Abbreviations
      • 4.1.4 Hardware Introduction
      • 4.1.5 Block Diagram Description
        • 4.1.5.1 Microprocessor
        • 4.1.5.2 Program ROM
        • 4.1.5.3 Scratch RAM
        • 4.1.5.4 Nonvolatile RAM
        • 4.1.5.5 Advanced Video Option
        • 4.1.5.6 Keyboard
        • 4.1.5.7 LEDs
        • 4.1.5.8 Keyboard Translator
        • 4.1.5.9 Transmit Buffer
        • 4.1.5.10 Communication Transmitter
        • 4.1.5.11 Communication Receiver
        • 4.1.5.12 SILO
        • 4.1.5.13 Control Function Parser
        • 4.1.5.14 Screen RAM
        • 4.1.5.15 Video Processor
        • 4.1.5.16 CRT Monitor
        • 4.1.5.17 Power Supply
        • 4.1.5.18 Standard Terminal Port
        • 4.1.5.19 EIA Interface
        • 4.1.5.20 Current Loop Interface Adapter
      • 4.1.6 Firmware Introduction
    • 4.2 Microprocessor
      • 4.2.1 8080 Microprocessor
      • 4.2.2 Data Bus and System Controller
      • 4.2.3 Clock Generator
      • 4.2.4 Bus Timing
      • 4.2.5 Microprocessor Memory
        • 4.2.5.1 Memory Map
        • 4.2.5.2 Memory Devices
        • 4.2.5.3 ROM Decoding
        • 4.2.5.4 RAM Decoding
        • 4.2.5.5 Memory Disable
      • 4.2.6 I/O Decoding
        • 4.2.6.1 PUSART Read and Write
        • 4.2.6.2 I/O Read and Write
      • 4.2.7 Interrupt Vector
      • 4.2.8 Power-Up and Self-Test
    • 4.3 Communication Transceiver
      • 4.3.1 PUSART Principles
      • 4.3.2 PUSART Operation
      • 4.3.3 PUSART Addressing
      • 4.3.4 PUSART Programming
      • 4.3.5 Data Transmission
      • 4.3.6 Data Reception
      • 4.3.7 Baud Rate Generator
      • 4.3.8 Serial Interface
      • 4.3.9 Modem Control
      • 4.3.10 Data Types
      • 4.3.11 SILO
      • 4.3.12 XON/XOFF
      • 4.3.13 Control Function Parser
      • 4.3.14 Local
      • 4.3.15 Standard Terminal Port
      • 4.3.16 Communication Self-Test
    • 4.4 Keyboard
      • 4.4.1 Keyboard Block Diagram
      • 4.4.2 Keyboard UARTs
      • 4.4.3 Keyboard Status Byte
      • 4.4.4 Key Address Counter
      • 4.4.5 Key Scanning and Address Formation
      • 4.4.6 Bidirectional Interface Operation
        • 4.4.6.1 Interface Line
        • 4.4.6.2 Receiving Side
        • 4.4.6.3 Terminal Data Encoding
        • 4.4.6.4 Combined Interface Signal
        • 4.4.6.5 Decoding of Data from Terminal
        • 4.4.6.6 Keyboard Output
      • 4.4.7 Bell
      • 4.4.8 Keyboard Interrupt Routine
      • 4.4.9 Logical Keyboard Processor
        • 4.4.9.1 Key Recognition
        • 4.4.9.2 Key Rollover
        • 4.4.9.3 Generation of Codes
        • 4.4.9.4 Keyboard Transmit Buffer
        • 4.4.9.5 Auto Repeat
    • 4.5 Nonvolatile RAM
      • 4.5.1 Principles
      • 4.5.2 NVR Device
      • 4.5.3 NVR Control
      • 4.5.4 NVR Support Circuits
      • 4.5.5 Microprocessor Management
      • 4.5.6 NVR Timing
    • 4.6 Video Processor
      • 4.6.1 Introduction
        • 4.6.1.1 The Raster
        • 4.6.1.2 Character Formation
        • 4.6.1.3 Video Processor Data
        • 4.6.1.4 Video Processor Character Generation
        • 4.6.1.5 Attributes
        • 4.6.1.6 Advanced Video Option (AVO)
      • 4.6.2 Timing Chip Description
        • 4.6.2.1 Input Decoder
        • 4.6.2.2 80/132 Column Selection
        • 4.6.2.3 Dot Counter
        • 4.6.2.4 Double-Width Multiplexer
        • 4.6.2.5 Horizontal Counter
        • 4.6.2.6 Horizontal Drive and Horizontal Blank
        • 4.6.2.7 Line Buffer Addressing
        • 4.6.2.8 Vertical Operation
        • 4.6.2.9 Vertical Counter
        • 4.6.2.10 Vertical Outputs
        • 4.6.2.11 Composite Sync
        • 4.6.2.12 Hold Request, Address Load, and Double-Width
        • 4.6.3 Control Chip Description
        • 4.6.3.1 Input Decoder Functions
        • 4.6.3.2 Attribute Latches
        • 4.6.3.3 Scroll Counter
        • 4.6.3.4 Scan Count Math
        • 4.6.3.5 Generation of HOLD REQUEST
        • 4.6.3.6 Horizontal Blank and Terminate
        • 4.6.3.7 Double Width and Hold Request
        • 4.6.3.8 Attributes
        • 4.6.3.9 Dot Stretcher
      • 4.6.4 Address Counter and Data Structure in RAM
      • 4.6.5 Address Latch Buffer
      • 4.6.6 Line Buffer
      • 4.6.7 Character Generator
      • 4.6.8 Video Shift Register
      • 4.6.9 Terminator
      • 4.6.10 DMA Cycle Timing Diagram
      • 4.6.11 Video Blanking
      • 4.6.12 Video Input and Output
        • 4.6.12.1 Direct Drive Video
        • 4.6.12.2 Composite Video Out
        • 4.6.12.3 Video In
      • 4.6.13 Intensity Control
    • 4.7 Microprocessor - Video Processor Interface
      • 4.7.1 Screen Memory Organization
      • 4.7.2 Fill Line Operation
      • 4.7.3 Line Organization
        • 4.7.3.1 Physical Screen
        • 4.7.3.2 Logical Screen
      • 4.7.4 Address Shuffling
      • 4.7.5 Shuffle Timing
      • 4.7.6 Scrolling Region
      • 4.7.7 Split Screen Jump Scrolling
      • 4.7.8 Smooth Scroll
      • 4.7.9 Split Screen Smooth Scrolling
      • 4.7.10 Cursor
      • 4.7.11 SET-UP
    • 4.8 Monitor
      • 4.8.1 Monitor Description: 30-16080 (Elston)
        • 4.8.1.1 Video Driver
        • 4.8.1.2 Brightness
        • 4.8.1.3 Vertical Oscillator
        • 4.8.1.4 Self-Oscillation
        • 4.8.1.5 Vertical Output
        • 4.8.1.6 Linearization
        • 4.8.1.7 Horizontal Driver
        • 4.8.1.8 Horizontal Deflection Operation
        • 4.8.1.9 Horizontal Output Circuit
        • 4.8.1.10 High Voltage and Focus
      • 4.8.2 Monitor Description: 30-14590 (Ball)
        • 4.8.2.1 Video Amplifier
        • 4.8.2.2 Vertical Deflection
        • 4.8.2.3 Horizontal Deflection
    • 4.9 Power Supply
      • 4.9.1 Power Input
      • 4.9.2 Start-Up Circuit
      • 4.9.3 Control Circuit
      • 4.9.4 Outputs
      • 4.9.5 Power Supply Specifications
        • 4.9.5.1 Input Specifications
        • 4.9.5.2 Cooling
        • 4.9.5.3 Base Product Power Requirements
  • Chapter 5 VT100 Series Service
    • 5.1 Introduction
    • 5.2 Troubleshooting
      • 5.2.1 Troubleshooting the VT100 with Self Test
      • 5.2.2 Troubleshooting Basic VT100 Variations Without Self Test
      • 5.2.3 Troubleshooting the VT105
      • 5.2.4 Troubleshooting the VT132
      • 5.2.5 Troubleshooting Options
      • 5.2.6 VT100 Internal Self Tests
        • 5.2.6.1 Power-Up Test
        • 5.2.6.2 Data Loopback Test
        • 5.2.6.3 EIA Test
        • 5.2.6.4 Video Adjust Test
        • 5.2.6.5 SET-UP Screen Test
      • 5.2.7 Error Codes
    • 5.3 Video Alignment
      • 5.3.1 General
      • 5.3.2 Monitor Adjustments (Ball Brothers)
        • 5.3.2.1 Brightness
        • 5.3.2.2 Focus
        • 5.3.2.3 Yoke Rotation
        • 5.3.2.4 Vertical Height
        • 5.3.2.5 Horizontal Width
        • 5.3.2.6 Centering
        • 5.3.2.7 Vertical Linearity
        • 5.3.2.8 Horizontal Linearity
        • 5.3.2.9 Vertical Hold
      • 5.3.3 Monitor Adjustments (Elston)
        • 5.3.3.1 Brightness
        • 5.3.3.2 Focus
        • 5.3.3.3 Yoke Rotation
        • 5.3.3.4 Vertical Height
        • 5.3.3.5 Horizontal Width
        • 5.3.3.6 Centering
        • 5.3.3.7 Vertical Linearity
    • 5.4 Module Removal and Replacement
      • 5.4.1 General
      • 5.4.2 Access Cover
      • 5.4.3 Terminal Controller Board
      • 5.4.4 Advanced Video Board
      • 5.4.5 VT105 Waveform Generator Board
      • 5.4.6 20 mA Current Loop Board
      • 5.4.7 Keyboard Top Cover
      • 5.4.8 Keyboard
      • 5.4.9 Keyboard Cable
      • 5.4.10 Keyboard Speaker
      • 5.4.11 Terminal Top Cover
      • 5.4.12 Video Monitor Board (Ball Monitor)
      • 5.4.13 Flyback Transformer (Ball Monitor)
      • 5.4.14 Video Monitor Board (Elston)
      • 5.4.15 Flyback Transformer (Elston)
      • 5.4.16 Terminal Bottom Cover
      • 5.4.17 Power Supply
      • 5.4.18 VT100 DC Power Harness
      • 5.4.19 VT105 DC Power Harness
      • 5.4.20 VT105 Expansion Backplane Removal and Installation
      • 5.4.21 Field Service CRT Monitor Assembly
      • 5.4.22 CRT Storage and Disposal
    • 5.5 Board Configurations
      • 5.5.1 Terminal Controller Board
      • 5.5.2 Advanced Video Board
      • 5.5.3 VT105 Waveform Generator Board
    • 5.6 Component Level Troubleshooting
      • 5.6.1 Troubleshooting the Terminal Controller
        • 5.6.1.1 Microprocessor
        • 5.6.1.2 Video Processor
        • 5.6.1.3 Communications
        • 5.6.1.4 Nonvolatile RAM
      • 5.6.2 Troubleshooting the Keyboard
      • 5.6.3 Troubleshooting the Power Supply
      • 5.6.4 Troubleshooting the CRT Monitor
      • 5.6.5 Troubleshooting the Options
  • Chapter 6 Options
    • 6.1 SET-UP Procedures for VT100 Series Options
      • 6.1.1 VT100-WA and VT100-WB SET-UP
      • 6.1.2 VT105 SET-UP
      • 6.1.3 VT132 SET-UP
        • 6.1.3.1 VT132 SET-UP A
        • 6.1.3.2 VT132 SET-UP B
        • 6.1.3.3 VT132 SET-UP C
        • 6.1.3.4 Changing a VT132 SET-UP Feature
        • 6.1.3.5 Setting the VT132 Answerback Message
        • 6.1.3.6 Setting the VT132 Transmit Parity
        • 6.1.3.7 Saving VT132 SET-UP Features
        • 6.1.3.8 Recalling VT132 SET-UP Features
        • 6.1.3.9 VT132 Default Feature Settings
        • 6.1.3.10 VT132 Tab Default
        • 6.1.3.11 VT132 General Default
        • 6.1.3.12 Resetting the VT132
    • 6.2 Advanced Video Option
      • 6.2.1 Advanced Video Option Installation
      • 6.2.2 Advanced Video Option Checkout
      • 6.2.3 Program Memory Expansion
      • 6.2.4 Alternate Character Set
        • 6.2.4.1 Alternate ROM Description
        • 6.2.4.2 Character ROM Programming
      • 6.2.5 AVO Technical Description
        • 6.2.5.1 Extended Character and Attribute Memory
        • 6.2.5.2 Character Attribute Latches
        • 6.2.5.3 Program ROM Decoding
      • 6.2.6 Troubleshooting the AVO
    • 6.3 20 mA Current Loop Adapter
      • 6.3.1 20 mA Current Loop Option Installation
      • 6.3.2 Configuration
      • 6.3.3 20 mA Current Loop Option Checkout
      • 6.3.4 Current Loop Principles
      • 6.3.4.1 Current Loop Adapter Description
      • 6.3.5 Interface Signals
      • 6.3.6 Interface Specifications
      • 6.3.7 Troubleshooting the Current Loop Adapter
    • 6.4 VT105 Graphics Processor
      • 6.4.1 Enabling Graphic Information
        • 6.4.1.1 Writing Data to the Waveform Generator
        • 6.4.1.2 Reading Data from the Waveform Generator
        • 6.4.1.3 Decoding the Input
        • 6.4.1.4 Selecting Mode of Operation
        • 6.4.1.5 Decoding Field Selection
        • 6.4.1.6 Phase Lock Loop Timing
        • 6.4.1.7 Establishing Desired Display
        • 6.4.1.8 Loading X-Address Information
        • 6.4.1.9 Loading Graph Memories
        • 6.4.1.10 Generating Baselines (Shade Lines)
        • 6.4.1.11 Enabling a Histogram (Shading a Graph)
        • 6.4.1.12 Loading Vertical Lines
        • 6.4.1.13 Adding Graph Marker
        • 6.4.1.14 Generating Horizontal Lines
        • 6.4.1.15 Generating Strip Charts
        • 6.4.1.16 Combining Video Out and Timing
      • 6.4.2 VT105 Graphic Test Procedure
        • 6.4.2.1 Test Set-Up
        • 6.4.2.2 Test Graph 0, Histogram 0, and Graph 0 Markers
        • 6.4.2.3 Test Graph 1, Histogram 1, and Graph 1 Markers
        • 6.4.2.4 Test the Horizontal Lines
        • 6.4.2.5 Test the Vertical Lines
        • 6.4.2.6 Test Shade Line 0 (Baseline 0)
        • 6.4.2.7 Test Shade Line 1 (Baseline 1)
        • 6.4.2.8 Test Strip Chart 0
        • 6.4.2.9 Test Strip Chart 1
        • 6.4.2.10 Exit the Graphic Test Mode
  • Chapter 7 Standard Terminal Port
    • 7.1 Introduction
    • 7.2 Definitions
    • 7.3 Overview
    • 7.4 Functional Specification
      • 7.4.1 Interface Signal Lines
      • 7.4.2 Protocol Specifications
        • 7.4.2.1 Terminal Operation With No Option Present
        • 7.4.2.2 Standard Set-Up for Local Link
        • 7.4.2.3 Control Sequences for Terminal Parameters
        • 7.4.2.4 Initialization
        • 7.4.2.5 BREAK
    • 7.5 Electrical Specifications
      • 7.5.1 Signal Lines
        • 7.5.1.1 Signal Levels
        • 7.5.1.2 Signal Timing
      • 7.5.2 Power Supply Lines
      • 7.5.3 Connector Pinout
    • 7.6 Mechanical Specifications
      • 7.6.1 Shorting Connector
      • 7.6.2 STP Connector Card
    • 7.7 Guidelines for the Designer
      • 7.7.1 Use With Receive Only Device
        • 7.7.1.1 Single UART Method
        • 7.7.1.2 Two UART Method
      • 7.7.2 Use With Passive Device
      • 7.7.3 Use With Active Device
        • 7.7.3.1 Terminal Processor as Standalone CPU
        • 7.7.3.2 Terminal Processor Augmenting Basic Terminal Operation
      • 7.7.4 Use With Communications Option
      • 7.7.5 Use With An External Processor
      • 7.7.6 Use With More Than One Option
  • Chapter 8 Graphics Connector
    • 8.1 Introduction
    • 8.2 Hardcopy Enable
  • Appendix A Programming Information
  • Appendix B Recommended Spares List (RSL)
  • Appendix C Glossary of Terms and Abbreviations

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