VAXmate Technical Reference Manual Volume 1

Company:Digital Equipment Corporation
Part:AA-JP76A-TH
Date:1987-02
Keywords:LK250 80286

Table of Contents

  • Chapter 1 VAXmate Workstation Overview
    • Base System
    • Optional Components
  • Chapter 2 VAXmate Microprocessor
    • Overview
      • Real Address Mode
      • Protected Virtual Address Mode
      • Coprocessor
    • Additional Sources of Information
    • Memory Map
    • Input/Output Address Map
    • Interrupt Vector Map
    • Bus Timing and Structure
    • Expansion Box Technical Specifications
    • Expansion Box Operating Ranges
  • Chapter 3 Interrupt Controllers
    • Overview
    • Additional Source of Information
    • Read/Write Control
    • Initialization Command Words
      • Initialization Command Word 1
      • Initialization Command Word 2
      • Initialization Command Word 3
        • ICW3 (Master)
        • ICW3 (Slave)
      • Initialization Command Word 4
    • Operation Command Words
      • Operation Command Word 1
      • Operation Command Word 2
      • Priority Rotation
      • Operation Command Word 3
      • Interrupt Request and In-Service Registers
        • Interrupt Request Register
        • In-Service Register
      • Poll Command
        • Poll Data Register
    • Interrupt Sequence
    • Programming Example
      • Constant Values and Data Structures
      • Initialization Data
      • Initializing the Peripheral Interrupt Controller
      • Issuing an End-of-Interrupt Command
      • Masking Interrupts
  • Chapter 4 DMA Controller
    • Overview
    • Additional Source of Information
    • Operation
      • Idle Cycle
      • Active Cycle
        • Single Transfer Mode
        • Block Transfer Mode
        • Demand Transfer Mode
        • Cascade Mode
      • Data Transfers
        • Auto-Initialize
        • Priority
        • Address Generation
    • Registers
      • Base and Current Address Register
      • Base and Current Word Register
      • Command Register
      • Write Single Mask Bit
      • Write All Mask Bits
      • Mode Register
      • Request Register
      • Status Register
      • Temporary Register
    • Programming Example
      • Constant Values
      • Data Structures
      • Initializing the DMA Controller
      • Opening a DMA Channel
      • Preparing a Channel for Data Transfer
      • Disabling a DMA Channel
  • Chapter 5 Real-Time Clock and CMOS RAM
    • Overview
    • Additional Source of Information
    • Battery-Backup Considerations
    • Real-Time Clock Registers
      • Register A
      • Register B
      • Register C
      • Register D
      • Real-Time Clock Data Registers
    • Alarms
    • Update Cycle
    • Interrupts
      • Update-Ended Interrupt
      • Alarm Interrupt
    • Programming Example
      • Constant Values
      • Data Structures
      • Reading the Registers and RAM
      • Writing the Registers and RAM
      • Calculating the Checksum
      • Converting Binary-Coded Data
      • Reading the Date
      • Reading the Time
      • Displaying the Date
      • Displaying the Time
      • Displaying the Diskette Drive Type
      • Displaying the Hard Disk Type
      • Handling the Clock Interrupts
      • Interpreting the RAM Contents
      • Initializing the Real-Time Clock
      • Restoring the Interrupt Vectors
      • Real-Time Clock Example
  • Chapter 6 Three-Channel Counter and Speaker
    • Overview
    • Additional Source of Information
    • Block Diagram
    • Counter Description
    • Mode Definitions
      • Mode 0 (Interrupt on Terminal Count)
        • Initializing Mode 0
        • Mode 0 Cycle
      • Mode 1 (Hardware Retriggerable One-Shot)
        • Initializing Mode 1
        • Mode 1 Cycle
      • Mode 2 (Rate Generator)
        • Initializing Mode 2
        • Mode 2 Cycle
      • Mode 3 (Square Wave Mode)
        • Initializing Mode 3
        • Mode 3 Cycle
      • Mode 4 (Software Triggered Strobe)
        • Initializing Mode 4
        • Mode 4 Cycle
      • Mode 5 (Hardware Triggered Strobe)
        • Initializing Mode 5
        • Mode 5 Cycle
    • Registers
      • System Register
      • Control Word Register
        • Counter-Latch Command (Control Word Register)
        • Read-Back Command (Control Word Register)
        • Status Response (Read-back Command)
    • Programming Example
      • Constant Values
      • Writing a Counter
      • Making a Bell Sound
      • Counter and Speaker Example
  • Chapter 7 Video Controller
    • Introduction
      • Industry-Standard Text and Graphics Features
      • Enhancements to Industry-Standard Features
      • Industry-Standard Features Not Available
      • Extra Features
    • Block Diagram
    • Additional Sources of Information
    • Video Modes
    • Text Modes
      • Character Buffer Format
      • Character Position to Memory Location Mapping
      • Programmable Cursor
      • Programmable Character Generator (Font RAM)
    • Graphics Mode
      • Mapping the Display to Address
    • Video Look-Up Table
    • Video System Registers
      • Special Purpose Register
      • CRTC Registers
        • Index Registers
        • Data Register
        • Register R0
        • Register R1
        • Register R2
        • Register R3
        • Register R4
        • Register R5
        • Register R6
        • Register R7
        • Register R8
        • Register R9
        • Register R10
        • Register R11
        • Register R12
        • Register R13
        • Register R14
        • Register R15
        • Register R16
        • Register R17
        • Status Register A
      • Status Register B
      • Write Data Register
      • Color Select Register
      • Control Register A
      • Control Register B
    • Monitor Interface
      • Monitor Specification Summary
    • Programming Example
  • Chapter 8 Keyboard-Interface Controller and Keyboard
    • Introduction
    • Keyboard-Interface Controller
      • Physical Interface to the CPU
      • Physical Interface to the Keyboard
      • Logical Interface
      • Control Functions
    • Keyboard-Interface Controller Diagnostics
    • Keyboard-Interface Controller Registers
      • Data Register
      • Command Register
      • Status Register
      • Command Register
        • Read Command Byte
        • Write Command Byte
        • Self-Test
        • Interface Test
        • Disable Keyboard
        • Enable Keyboard
        • Read Port 1
        • Write Port 1
        • Read Port 2
        • Write Port 2
        • Read Test Inputs
        • Write Status Register
        • Pulse Output Port
      • Keyboard-Interface Controller Error Handling
    • LK250 Keyboard
      • Scan Codes
      • LK250 Keyboard Command Codes
        • Invalid Commands
        • Request Keyboard ID
        • Enter DIGITAL Extended Scan Code Mode
        • Exit DIGITAL Extended Scan Code Mode
        • Set Keyboard LED
        • Reset Keyboard LED
        • Set Keyclick Volume
        • Enable Autorepeat
        • Disable Autorepeat
        • Keyboard Mode Lock
        • Keyboard Mode Unlock
        • Reserved
        • LEDS On/Off
        • Echo
        • Reserved
        • Set Autorepeat Delay and Rate
        • Enable Key Scanning
        • Disable Key Scanning and Restore to Defaults
        • Restore To Defaults
        • Reserved
        • Resend
        • Reset
      • LK250 Keyboard Responses
        • Buffer overrun
        • Self-test success
        • ECHO
        • Release Prefix
        • Acknowledge (ACK)
        • Self-Test Failure
        • Resend
      • LK250 Keyboard Error Handling
      • U.S. and Foreign Keyboards
    • Programming Example
  • Chapter 9 Serial Communications
    • Overview
    • Additional Sources of Information
      • Receive Buffer Register/Transmitter Holding Register
      • Interrupt Enable Register
      • Interrupt Identification Register
      • Line Control Register
      • Modem Control Register
        • Diagnostic Loopback
      • Line Status Register
      • Modem Status Register
      • Divisor Latches
    • Modem Control Programming Exceptions
      • Special Purpose Register
    • Communications Connector Signals
    • Printer Connector Signals
    • Modem Connector Signals
    • Programming Example
      • Program Description
  • Chapter 10 Mouse Information
    • Introduction
    • Communication Requirements
    • Additional Source of Information
    • Mouse Commands
      • Prompt Mode Incremental Stream Mode
      • Request Mouse Position
      • Invoke Self-Test
      • Vendor Reserved Function
    • Mouse Reports
      • Position Report - Byte 1
      • Position Report - Byte 2
      • Position Report - Byte 3
      • Self-Test Report - Byte 1
      • Self-Test Report - Byte 2
      • Self-Test Report - Byte 3
      • Self-Test Report - Byte 4
    • Serial Interface
      • Transmit Holding Register and Receive Buffer
      • Status Register
      • Mode Register 1
      • Mode Register 2
      • Command Register
    • Programming Example
  • Chapter 11 Diskette Drive Controller
    • Introduction
    • Diskette Drive Controller Registers
      • Control Register
      • Main Status Register
      • Data Register
      • Data Transfer Rate Register
      • Change Register
    • Diskette Drive Controller Internal Registers
      • Internal Register - Command
      • Internal Register - Head/Unit Select
      • Internal Register - Status Register 0
      • Internal Register - Status Register 1
      • Internal Register - Status Register 2
      • Internal Register - Status Register 3
      • Internal Register - SRT/HUT
      • Internal Register - HLT/ND
      • Internal Register - C
      • Internal Register - H
      • Internal Register - R
      • Internal Register - N
      • Internal Register - EOT
      • Internal Register - GPL
      • Internal Register - DTL
      • Internal Register - SC
      • Internal Register - D
      • Internal Register - STP
      • Internal Register - PCN
      • Internal Registers - NCN
    • Diskette Drive Controller Programming
      • Command State
      • Execution State
      • Result State
      • Command and Result Register Sets
    • Programming Example
  • Chapter 12 Hard Disk Drive Controller
    • Introduction
    • Hard Disk Controller Registers
      • Data Register
      • Write Precompensation Register
      • Error Register
      • Sector Count Register
      • Sector Number Register
      • Cylinder Number Low Register
      • Cylinder Number High Register
      • SDH Register
      • Command Register
        • Restore Command
        • Seek Command
        • Read Sector Command
        • Write Sector Command
        • Format Track Command
        • Read Verify Command
        • Diagnose Command
        • Set Parameters Command
      • Status Register
      • Alternate Status Register
      • Hard Disk Register
      • Digital Input Register
    • Programming Example
  • Chapter 13 Network Hardware Interface
    • Introduction to the LANCE
    • Additional Source of Information
    • Functional Description of the Network Hardware Interface
      • The Coax Transceiver Interface
      • The Serial Interface Adapter
      • The Local Area Network Controller
    • Programming the LANCE
      • Initialization Block
      • Receive and Transmit Descriptor Rings
      • Data Buffers
      • Programming Sequence
      • Register Description
      • Register Data Port (RDP)
      • Control And Status Register 0
      • Control And Status Register 1
      • Control And Status Register 2
      • Control And Status Register 3
      • NI CSR
      • Initialization Block
      • Mode Field
      • Physical Address Field
      • Logical Address Filter Field
      • Receive Descriptor Ring Pointer Field
      • Transmit Descriptor Ring Pointer Field
      • Buffer Management
      • Descriptor Rings in Memory
      • Receive Descriptor Rings
      • Receive Message Descriptor 0 (RMD0)
      • Receive Message Descriptor 1 (RMD1)
      • Receive Message Descriptor 2 (RMD2)
      • Receive Message Descriptor 3 (RMD3)
      • Transmit Descriptor Ring
      • Transmit Message Descriptor 0 (TMD0)
      • Transmit Message Descriptor 1 (TMD1)
      • Transmit Message Descriptor 2 (TMD2)
      • Transmit Message Descriptor 3 (TMD3)
      • Network Interface External Interconnect
      • Network Interface System Bus Interconnect

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