| Text: | This manual describes the instruction set architecture (ISA) for both the central processing unit (CPU) and the floating- point unit (FPU) in the MIPS IV RISC architecture, which subsumes all previous versions of the architecture. The ISA defines nonprivileged instructions that execute in User mode, and includes the architectural level at which the instruction was first defined or extended. This manual does not define any of the privileged instructions executed by the implementation-specific System Control Processor. Such implementation-specific information may be found in the respective processor's User Guide. |
